
Obj/FWlib_apt32f172_oamp.o:     file format elf32-csky-little


Disassembly of section .text:

00000000 <OPA_RESET_VALUE>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void OPA_RESET_VALUE(void)
{
		OAMP->CR0=OPA0_CR_RST;     					/**< OPA0_CR  reset value   */
   0:	1064      	lrw      	r3, 0	// 10 <OPA_RESET_VALUE+0x10>
   2:	3200      	movi      	r2, 0
   4:	9360      	ld.w      	r3, (r3, 0)
   6:	b340      	st.w      	r2, (r3, 0)
		OAMP->CR1=OPA1_CR_RST;     					/**< OPA1_CR  reset value  	*/
   8:	b341      	st.w      	r2, (r3, 0x4)
		OAMP->GATR0=OPA0_GATR_RST;					/**< OPA0_GATR reset value  */
   a:	b342      	st.w      	r2, (r3, 0x8)
		OAMP->GATR1=OPA1_GATR_RST;     				/**< OPA1_GATR reset value  */
   c:	b343      	st.w      	r2, (r3, 0xc)
}
   e:	783c      	rts
  10:	00000000 	.long	0x00000000

00000014 <OPA_IO_Init>:
//OPA1P(0->PA1.0(AF7))),OPA1N(0->PA1.2(AF7))),OPA1X(0->PA1.1(AF7)))
//ReturnValue:NONE
/*************************************************************/  
void OPA_IO_Init(OPA_IO_MODE_TypeDef  OPA_IO_MODE_X , U8_T OPA_IO_G )
{
	if(OPA_IO_MODE_X==OPA0P)
  14:	3841      	cmpnei      	r0, 1
  16:	080d      	bt      	0x30	// 30 <OPA_IO_Init+0x1c>
	{
		if(OPA_IO_G==0)
  18:	3940      	cmpnei      	r1, 0
  1a:	080a      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
		{
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFF0FFFF)|0x000A0000;										//OPA0P(PA1.4->AF7)
  1c:	126f      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  1e:	32f0      	movi      	r2, 240
  20:	9320      	ld.w      	r1, (r3, 0)
  22:	9160      	ld.w      	r3, (r1, 0)
  24:	424c      	lsli      	r2, r2, 12
  26:	68c9      	andn      	r3, r2
  28:	3bb1      	bseti      	r3, r3, 17
  2a:	3bb3      	bseti      	r3, r3, 19
	}
	else if(OPA_IO_MODE_X==OPA0N)
	{
		if(OPA_IO_G==0)
		{
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00A00000;										//OPA0N(PA1.5->AF7)
  2c:	b160      	st.w      	r3, (r1, 0)
		if(OPA_IO_G==0)
		{
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFFFF0F)|0x000000A0;										//OPA1X(PA1.1->AF7)
		}
	}
}
  2e:	783c      	rts
	else if(OPA_IO_MODE_X==OPA0N)
  30:	3842      	cmpnei      	r0, 2
  32:	080c      	bt      	0x4a	// 4a <OPA_IO_Init+0x36>
		if(OPA_IO_G==0)
  34:	3940      	cmpnei      	r1, 0
  36:	0bfc      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00A00000;										//OPA0N(PA1.5->AF7)
  38:	1268      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  3a:	32f0      	movi      	r2, 240
  3c:	9320      	ld.w      	r1, (r3, 0)
  3e:	9160      	ld.w      	r3, (r1, 0)
  40:	4250      	lsli      	r2, r2, 16
  42:	68c9      	andn      	r3, r2
  44:	3bb5      	bseti      	r3, r3, 21
  46:	3bb7      	bseti      	r3, r3, 23
  48:	07f2      	br      	0x2c	// 2c <OPA_IO_Init+0x18>
	else if(OPA_IO_MODE_X==OPA0X)
  4a:	3843      	cmpnei      	r0, 3
  4c:	080c      	bt      	0x64	// 64 <OPA_IO_Init+0x50>
		if(OPA_IO_G==0)
  4e:	3940      	cmpnei      	r1, 0
  50:	0bef      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFF0FFF)|0x0000A000;										//OPA0X(PA1.3->AF7)
  52:	1262      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  54:	32f0      	movi      	r2, 240
  56:	9320      	ld.w      	r1, (r3, 0)
  58:	9160      	ld.w      	r3, (r1, 0)
  5a:	4248      	lsli      	r2, r2, 8
  5c:	68c9      	andn      	r3, r2
  5e:	3bad      	bseti      	r3, r3, 13
  60:	3baf      	bseti      	r3, r3, 15
  62:	07e5      	br      	0x2c	// 2c <OPA_IO_Init+0x18>
	else if(OPA_IO_MODE_X==OPA1P)
  64:	3844      	cmpnei      	r0, 4
  66:	080c      	bt      	0x7e	// 7e <OPA_IO_Init+0x6a>
		if(OPA_IO_G==0)
  68:	3940      	cmpnei      	r1, 0
  6a:	0be2      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFFFFF0)|0x0000000A;										//OPA1P(PA1.0->AF7)
  6c:	117b      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  6e:	310f      	movi      	r1, 15
  70:	9340      	ld.w      	r2, (r3, 0)
  72:	9260      	ld.w      	r3, (r2, 0)
  74:	68c5      	andn      	r3, r1
  76:	3ba1      	bseti      	r3, r3, 1
  78:	3ba3      	bseti      	r3, r3, 3
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFFFF0F)|0x000000A0;										//OPA1X(PA1.1->AF7)
  7a:	b260      	st.w      	r3, (r2, 0)
}
  7c:	07d9      	br      	0x2e	// 2e <OPA_IO_Init+0x1a>
	else if(OPA_IO_MODE_X==OPA1N)
  7e:	3845      	cmpnei      	r0, 5
  80:	080c      	bt      	0x98	// 98 <OPA_IO_Init+0x84>
		if(OPA_IO_G==0)
  82:	3940      	cmpnei      	r1, 0
  84:	0bd5      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFFF0FF)|0x00000A00;										//OPA1N(PA1.2->AF7)
  86:	1175      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  88:	32f0      	movi      	r2, 240
  8a:	9320      	ld.w      	r1, (r3, 0)
  8c:	9160      	ld.w      	r3, (r1, 0)
  8e:	4244      	lsli      	r2, r2, 4
  90:	68c9      	andn      	r3, r2
  92:	3ba9      	bseti      	r3, r3, 9
  94:	3bab      	bseti      	r3, r3, 11
  96:	07cb      	br      	0x2c	// 2c <OPA_IO_Init+0x18>
	else if(OPA_IO_MODE_X==OPA1X)
  98:	3846      	cmpnei      	r0, 6
  9a:	0bca      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
		if(OPA_IO_G==0)
  9c:	3940      	cmpnei      	r1, 0
  9e:	0bc8      	bt      	0x2e	// 2e <OPA_IO_Init+0x1a>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFFFFF0F)|0x000000A0;										//OPA1X(PA1.1->AF7)
  a0:	116e      	lrw      	r3, 0	// 158 <OPA_Config_Prg+0x76>
  a2:	31f0      	movi      	r1, 240
  a4:	9340      	ld.w      	r2, (r3, 0)
  a6:	9260      	ld.w      	r3, (r2, 0)
  a8:	68c5      	andn      	r3, r1
  aa:	3ba5      	bseti      	r3, r3, 5
  ac:	3ba7      	bseti      	r3, r3, 7
  ae:	07e6      	br      	0x7a	// 7a <OPA_IO_Init+0x66>

000000b0 <OPA_EN_CMD>:
//OPAx_NUM:OPA0_NUM,OPA1_NUM,
//
/*************************************************************/  
void OPA_EN_CMD(OPAx_selecte_TypeDef OPAx_NUM , FunctionalStatus NewState)
{
	if(OPAx_NUM==OPA0_NUM)
  b0:	3840      	cmpnei      	r0, 0
  b2:	080b      	bt      	0xc8	// c8 <OPA_EN_CMD+0x18>
  b4:	116a      	lrw      	r3, 0	// 15c <OPA_Config_Prg+0x7a>
	{
		if (NewState != DISABLE)
  b6:	3940      	cmpnei      	r1, 0
		{
			OAMP->CR0|=0X01;								//Enable
  b8:	9340      	ld.w      	r2, (r3, 0)
  ba:	9260      	ld.w      	r3, (r2, 0)
		if (NewState != DISABLE)
  bc:	0c04      	bf      	0xc4	// c4 <OPA_EN_CMD+0x14>
			OAMP->CR0|=0X01;								//Enable
  be:	3ba0      	bseti      	r3, r3, 0
		}
		else
		{
			OAMP->CR0&=0XFFFFFFFE;						//Disable
  c0:	b260      	st.w      	r3, (r2, 0)
		else
		{
			OAMP->CR1&=0XFFFFFFFE;						//Disablev
		}
	}
}
  c2:	783c      	rts
			OAMP->CR0&=0XFFFFFFFE;						//Disable
  c4:	3b80      	bclri      	r3, r3, 0
  c6:	07fd      	br      	0xc0	// c0 <OPA_EN_CMD+0x10>
	else if(OPAx_NUM==OPA1_NUM)
  c8:	3841      	cmpnei      	r0, 1
  ca:	0bfc      	bt      	0xc2	// c2 <OPA_EN_CMD+0x12>
  cc:	1164      	lrw      	r3, 0	// 15c <OPA_Config_Prg+0x7a>
		if (NewState != DISABLE)
  ce:	3940      	cmpnei      	r1, 0
			OAMP->CR1|=0X01;								//Enable
  d0:	9340      	ld.w      	r2, (r3, 0)
  d2:	9261      	ld.w      	r3, (r2, 0x4)
		if (NewState != DISABLE)
  d4:	0c04      	bf      	0xdc	// dc <OPA_EN_CMD+0x2c>
			OAMP->CR1|=0X01;								//Enable
  d6:	6c0c      	or      	r0, r3
  d8:	b201      	st.w      	r0, (r2, 0x4)
  da:	07f4      	br      	0xc2	// c2 <OPA_EN_CMD+0x12>
			OAMP->CR1&=0XFFFFFFFE;						//Disablev
  dc:	3b80      	bclri      	r3, r3, 0
  de:	b261      	st.w      	r3, (r2, 0x4)
}
  e0:	07f1      	br      	0xc2	// c2 <OPA_EN_CMD+0x12>

000000e2 <OPA_Config_Prg>:
//PGAC_Set:0~7 OPA0(0->x1,1->x2,2->x3,3->x4,4->x5,5->x6,6->x7,7->x8); OPA1(0->x1,1->x10,2->x20,3->x40,4->x60,5->x80,6->x100,7->x120)
//GATRM_Set:0~15 (微调参参数,值越大放大倍速相应减小)
//ReturnValue:NONE
/*************************************************************/  
void OPA_Config_Prg(OPAx_selecte_TypeDef OPAx_NUM , PGAEN_CMD_TypeDef PGAEN_CMD_x , Op_ExtPinConnect_TypeDef Op_ExtPinConnect_X  , U8_T IPSEL_SET_x , U8_T PGAC_Set , U8_T GATRM_Set)
{
  e2:	14c3      	push      	r4-r6
	if(OPAx_NUM==OPA0_NUM)
  e4:	3840      	cmpnei      	r0, 0
{
  e6:	d88e000c 	ld.b      	r4, (sp, 0xc)
  ea:	d8ae0010 	ld.b      	r5, (sp, 0x10)
	if(OPAx_NUM==OPA0_NUM)
  ee:	0819      	bt      	0x120	// 120 <OPA_Config_Prg+0x3e>
	{
		if(Op_ExtPinConnect_X==Op_ExtPinConnect_EN)
  f0:	3a41      	cmpnei      	r2, 1
  f2:	101b      	lrw      	r0, 0	// 15c <OPA_Config_Prg+0x7a>
  f4:	0811      	bt      	0x116	// 116 <OPA_Config_Prg+0x34>
		{
			OAMP->GATR0=0xA77A << 16|GATRM_Set|0x08;
  f6:	90c0      	ld.w      	r6, (r0, 0)
  f8:	105a      	lrw      	r2, 0xa77a0008	// 160 <OPA_Config_Prg+0x7e>
		}
		if(Op_ExtPinConnect_X==Op_ExtPinConnect_DIS)
		{
			OAMP->GATR0=0xA77A << 16|GATRM_Set;
  fa:	6d48      	or      	r5, r2
  fc:	b6a2      	st.w      	r5, (r6, 0x8)
		}
		OAMP->CR0=(OAMP->CR0 & 0XFFFFFCE1)|(PGAEN_CMD_x<<1)|(IPSEL_SET_x<<8)|(PGAC_Set<<2);
  fe:	9040      	ld.w      	r2, (r0, 0)
 100:	4482      	lsli      	r4, r4, 2
 102:	4121      	lsli      	r1, r1, 1
 104:	9200      	ld.w      	r0, (r2, 0)
 106:	6c50      	or      	r1, r4
 108:	1097      	lrw      	r4, 0x31e	// 164 <OPA_Config_Prg+0x82>
 10a:	6811      	andn      	r0, r4
 10c:	6c40      	or      	r1, r0
 10e:	4368      	lsli      	r3, r3, 8
 110:	6cc4      	or      	r3, r1
 112:	b260      	st.w      	r3, (r2, 0)
		{
			OAMP->GATR1=0xA77A << 16|GATRM_Set;
		}
		OAMP->CR1=(OAMP->CR1 & 0XFFFFFCE1)|(PGAEN_CMD_x<<1)|(IPSEL_SET_x<<8)|(PGAC_Set<<2);
	}
}
 114:	1483      	pop      	r4-r6
		if(Op_ExtPinConnect_X==Op_ExtPinConnect_DIS)
 116:	3a40      	cmpnei      	r2, 0
 118:	0bf3      	bt      	0xfe	// fe <OPA_Config_Prg+0x1c>
			OAMP->GATR0=0xA77A << 16|GATRM_Set;
 11a:	90c0      	ld.w      	r6, (r0, 0)
 11c:	1053      	lrw      	r2, 0xa77a0000	// 168 <OPA_Config_Prg+0x86>
 11e:	07ee      	br      	0xfa	// fa <OPA_Config_Prg+0x18>
	else if(OPAx_NUM==OPA1_NUM)
 120:	3841      	cmpnei      	r0, 1
 122:	0bf9      	bt      	0x114	// 114 <OPA_Config_Prg+0x32>
		if(Op_ExtPinConnect_X==Op_ExtPinConnect_EN)
 124:	3a41      	cmpnei      	r2, 1
 126:	100e      	lrw      	r0, 0	// 15c <OPA_Config_Prg+0x7a>
 128:	0811      	bt      	0x14a	// 14a <OPA_Config_Prg+0x68>
			OAMP->GATR1=0xA77A << 16|GATRM_Set|0x08;
 12a:	104e      	lrw      	r2, 0xa77a0008	// 160 <OPA_Config_Prg+0x7e>
 12c:	90c0      	ld.w      	r6, (r0, 0)
 12e:	6d48      	or      	r5, r2
 130:	b6a3      	st.w      	r5, (r6, 0xc)
		OAMP->CR1=(OAMP->CR1 & 0XFFFFFCE1)|(PGAEN_CMD_x<<1)|(IPSEL_SET_x<<8)|(PGAC_Set<<2);
 132:	9040      	ld.w      	r2, (r0, 0)
 134:	4482      	lsli      	r4, r4, 2
 136:	4121      	lsli      	r1, r1, 1
 138:	9201      	ld.w      	r0, (r2, 0x4)
 13a:	6c50      	or      	r1, r4
 13c:	108a      	lrw      	r4, 0x31e	// 164 <OPA_Config_Prg+0x82>
 13e:	6811      	andn      	r0, r4
 140:	6c40      	or      	r1, r0
 142:	4368      	lsli      	r3, r3, 8
 144:	6cc4      	or      	r3, r1
 146:	b261      	st.w      	r3, (r2, 0x4)
}
 148:	07e6      	br      	0x114	// 114 <OPA_Config_Prg+0x32>
		if(Op_ExtPinConnect_X==Op_ExtPinConnect_DIS)
 14a:	3a40      	cmpnei      	r2, 0
 14c:	0bf3      	bt      	0x132	// 132 <OPA_Config_Prg+0x50>
			OAMP->GATR1=0xA77A << 16|GATRM_Set;
 14e:	10c7      	lrw      	r6, 0xa77a0000	// 168 <OPA_Config_Prg+0x86>
 150:	9040      	ld.w      	r2, (r0, 0)
 152:	6d58      	or      	r5, r6
 154:	b2a3      	st.w      	r5, (r2, 0xc)
 156:	07ee      	br      	0x132	// 132 <OPA_Config_Prg+0x50>
	...
 160:	a77a0008 	.long	0xa77a0008
 164:	0000031e 	.long	0x0000031e
 168:	a77a0000 	.long	0xa77a0000
